Its a good practice to use the clocking blocks for creating verification components. There are some scenarios, where you have to wait on change on some values. As an example, when DUT drives the valid signal, in monitor you wait for valid signal and then read other signal on next clock. Lets say the DUT drives a valid signals and in your monitor you have to wait till valid is high and wait for two clocks. Then in your montior, you do something like this: wait ( interface .cb.valid == 1'b1 ); @ interface .cb; @ interface .cb; What do you expect? when valid happens, then wait for two clock cycles. But this may not happen. the first wait and then @interface.cb may happen in same cycle. This is because the clocking block events are synchronous. The wait and the @() statement will execute in same delta. Instead, the best way is to use this: @(tif1.cb iff tif1.cb.data); In this way, you wait every clock only if the cb.data is high. Code: https://www.edaplayground.com